| Clock Oscillators | |||||||||||||
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T3000LP
Series Clock Oscillator
Low Stand-by Current, SMD RoHS Compliance Standard
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| Symbol | Unit | Min. | Typ. | Max. | ||||
| 5 V | 3.3 V | 5 V | 3.3 V | 5 V | 3.3 V | |||
| Center Frequency |
fo
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MHz | 8.5 | — | 125 | |||
| Operating Temp. Range |
T
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°C | See Table | |||||
| Frequency Stability | — | ppm | See Table | |||||
| Supply
Current 1MHz < 19MHz 20MHz < 49MHz 50MHz < 69MHz 70MHz < 125MHz |
IDD
|
mA mA mA mA |
— |
— |
10 30 40 40 |
7 20 30 30 |
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| Output
Levels (CMOS) Output High (Logic "1") Output Low (Logic "0") |
VOH VOL |
V V |
90% |
— | 10% |
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| Transition
Times Rise/Fall Time (1MHz to 19MHz) Rise/Fall Time (20MHz to 49MHz) Rise/Fall Time (50MHz to 69MHz) Rise/Fall Time (70MHz to 125MHz) |
TR/TF | ns ns ns |
—
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— |
8 5 2 2 |
10 6 3 3 |
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| Start Up Time | mSec | 8 | ||||||
| Output Symmetry | SYM | % | 40 | 45/55 | 60 | |||
| Absolute Clock Period Jitter | pSec | 40 | ||||||
| Storage Temperature | — | °C | -55 | — | +125 | |||
| Tri-State
(Input to Pin 1) Output Active Output in High-impedance State |
Tri-State Tri-State |
V V |
4.0 |
2.0 |
1.75 |
1.26 |
0.8 |
0.5 |
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(1) Inclusive of calibration at 25°C, operating temperature range, input voltage
variation, load variation, aging, shock and vibration. (2) Transition times are measured between 10% and 90% of VDD, with an output load of 15pF (3) 50pF output load available |
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| Temperature | Stability (ppm) |
| 0 to 50° C | ±20, ±25, ±32, ±50, ±100 |
| -10 to 60° C | ±20, ±25, ±32, ±50, ±100 |
| -20 to 70° C | ±20, ±25, ±32, ±50, ±100 |
| -40 to 85° C | ±25, ±32, ±50, ±100 |
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